The Export Control Paradox: Washington Bought Time, Then Watched China Spend It

Three days ago, DeepSeek released V4 — a 1.6 trillion parameter model optimized for Huawei's Ascend AI processors rather than Nvidia hardware. Huawei announced "day zero" adaptation⁵ across its full Ascend SuperNode product line. Alibaba, ByteDance, and Tencent have placed bulk orders for hundreds of thousands of Huawei Ascend 950 chips³, driving prices up 20%. And DeepSeek's V4-Pro output tokens cost $3.48 per million¹⁴ — roughly one-seventh the price of GPT-5.5 or Claude Opus 4.7.

This is the moment that US export control planners said couldn't arrive yet. And the obvious question is whether the policy failed. I've spent the last week looking at the evidence, and my answer is more uncomfortable than either the hawks or the doves want to hear: the export controls achieved exactly what their architects claimed they would, while simultaneously producing the conditions for their own obsolescence.

Let me start with what the controls actually accomplished. TSMC Arizona is now producing 4nm chips on US soil¹⁵, with 3nm production targeted for 2027 — a full year ahead of the original schedule. The total TSMC investment in Arizona has ballooned to $165 billion¹⁶, including six planned fabs, two packaging facilities, and an R&D center. The Netherlands has restricted ASML EUV sales to China since 2019, Japan imposed parallel controls in 2023, and a new bipartisan MATCH Act¹⁹ introduced in Congress this month would extend the ban to DUV immersion lithography systems and their servicing. These are real structural achievements. The allied coordination didn't exist in 2020. TSMC wasn't producing leading-edge chips in America in 2020. These things happened, in part, because the export control framework created the political conditions and urgency that made them possible.

But here's the problem. The policy was predicated on a specific empirical estimate about how long it would take China to develop meaningful domestic alternatives. BIS advisory bodies projected 5-7 years. Huawei's 7nm Kirin chip appeared within 18 months of the October 2022 controls tightening. And the story has only accelerated since.

The data from the last few months tells a startlingly clear story about the speed of convergence. Stanford's 2026 AI Index Report¹², released two weeks ago, found that the performance gap between the best US and Chinese AI models has collapsed to 2.7% on the Arena benchmark — down from over 30% in 2023. Anthropic's Claude Opus 4.6 leads with an Arena score of 1,503; ByteDance's Dola-Seed-2.0 sits at 1,464. The top four models globally are separated by fewer than 25 Arena points. And this near-parity exists despite the US spending 23 times more on private AI investment¹³ than China ($285.9 billion vs. $12.4 billion in 2025).

I want to be precise about what the benchmark data does and doesn't show. DeepSeek V4-Pro, for all its efficiency innovations, trails GPT-5.5 and Claude Opus 4.7 on the hardest reasoning benchmarks¹⁴ — Humanity's Last Exam, Terminal-Bench 2.0, SWE-bench Pro. It leads on coding-heavy benchmarks like LiveCodeBench and competitive programming. As VentureBeat put it, V4-Pro "does not need to win every leaderboard row to matter" — its near-frontier performance at one-sixth to one-seventh the API cost "forces a major rethink of the economics of advanced AI deployment." This is the key insight. The strategic question is not whether Chinese models match the absolute frontier on the hardest tasks. It's whether they're close enough, at dramatically lower cost, to be deployable for the economic and military applications that actually matter.

On the hardware side, the ceiling argument is weakening faster than expected. The Ascend 910C delivers approximately 60% of an H100's inference performance¹⁰ on a per-chip basis. That's not parity. But Huawei's CloudMatrix 384 system — linking 384 Ascend 910C chips in an all-optical mesh — reportedly matches or exceeds Nvidia's GB200 NVL72 on aggregate compute and memory bandwidth¹¹, albeit at significantly higher power consumption. Huawei plans to produce roughly 600,000 Ascend 910C chips in 2026³ and next-gen 960 and 970 chips are in the pipeline, each targeting approximately 2x performance gains. The Ascend 950 series, now shipping, is broadly assessed as sitting between Nvidia's H100 and H200 in capability³.

And SMIC's process node advancement hasn't stalled. A TechInsights teardown⁹ confirmed that the Kirin 9030, powering Huawei's Mate 80, uses SMIC's N+3 process — a scaled extension of its 7nm node that represents incremental but real progress. SMIC has entered pilot runs for its 5nm process⁸ using multi-patterning DUV techniques, with yields reportedly between 20-40% and costs roughly 50% higher than TSMC's equivalent. It's expensive. It's inefficient. And it works well enough for strategic purposes.

This brings me to what I think the conventional analysis gets wrong. The standard framing treats this as a binary: either the controls "worked" (bought time, built structural advantage) or they "failed" (accelerated Chinese self-sufficiency). I think both of these are partly right and partly miss the deeper point.

The controls worked as a time-buying mechanism. The structural investments — TSMC Arizona, allied coordination, CHIPS Act funding — are real and valuable. But the time-buying framing contains a hidden assumption that the debate hasn't adequately surfaced: it assumes the side buying time is running faster than the side being slowed. The Stanford data suggests this assumption may no longer hold. The US still leads on model performance, but by a margin of 2.7%. The US spends 23x more but gets less than 3% more capability at the frontier. China leads on patents, publications, citations, and industrial robotics deployments. The direction of travel favors the more efficient competitor, not the one with more resources.

The AEI's April 2026 report on the "lithography loophole"¹⁷ is the most important policy document on this topic right now. It identifies the core vulnerability: China acquired roughly 90 ASML DUV immersion lithography machines in 2024 alone, and its fleet of several hundred DUVi machines "will almost certainly be capable of printing millions of high-end logic dies in 2026." The existing controls successfully blocked EUV. They left the DUV door wide open. And ASML continues to service these machines in China¹⁸, potentially extending their lifespan to 30 years.

This is the part that matters most for what happens next. The MATCH Act, if passed, would close the DUV loophole by banning exports and servicing of DUV immersion systems to Chinese facilities not controlled by the US or allies. But it's still a bill working through Congress, with a 150-day diplomatic window²¹ for allies to tighten their own controls first. Every month of delay is another month SMIC uses to improve yields on its DUV-based 5nm process. The policy clock is running against the policymakers.

My assessment is this: the export controls were a defensible policy choice in 2022, predicated on a time estimate that proved dramatically wrong. The time was used productively — but not productively enough to maintain the gap the policy was designed to preserve. DeepSeek V4 on Huawei Ascend chips is not proof the controls failed. It's proof that the controls are a depreciating asset: useful when first deployed, but losing value every quarter they aren't updated.

The real test arrives over the next 12-18 months. Watch for three things. First, whether the MATCH Act passes and whether DUV servicing restrictions are actually enforced — this is the single most consequential policy lever Washington still holds, since ASML DUVi machines require maintenance approximately every six months¹⁸ to remain effective. Second, whether SMIC achieves commercially viable 5nm yields (above 40%) — that's the threshold at which the fabrication gap narrows enough to support next-generation Ascend chips that could challenge the H200 class. And third, whether the AI performance gap measured by Stanford's next Index widens, stabilizes, or continues to compress. If it compresses below 2% with Chinese models running primarily on domestic hardware, the era of using semiconductor controls as strategic leverage will effectively be over. The data so far suggests that's exactly where this is heading.